HT46RU25/HT46CU25
Functional Description
Execution Flow
The system clock is derived from either a crystal or an
RC oscillator or an 32768Hz crystal. It is internally di-
vided into four non-overlapping clocks. One instruction
cycle consists of four system clock cycles. Instruction
fetching and execution are pipelined in such a way that a
fetch takes one instruction cycle while decoding and ex-
ecution takes the next instruction cycle. The pipelining
scheme makes it possible for each instruction to be ef-
fectively executed in a cycle. If an instruction changes
the value of the program counter, two cycles are re-
quired to complete the instruction.
S y s te m
C lo c k
T 1
T 2
T 3
T 4
T 1
Program Counter
-
PC
The program counter (PC) is 14 bits wide and it controls
the sequence in which the instructions stored in the pro-
gram ROM are executed. The contents of the PC can
specify a maximum of 16384´16 addresses. After ac-
cessing a program memory word to fetch an instruction
code, the value of the PC is incremented by 1. The PC
then points to the memory word containing the next in-
struction code. When executing a jump instruction, con-
ditional skip execution, loading a PCL register, a
subroutine call, an initial reset, an internal interrupt, an
external interrupt, or returning from a subroutine, the PC
T 2
T 3
T 4
T 1
T 2
T 3
T 4
O S C 2 ( R C o n ly )
P C
P C
P C + 1
P C + 2
F e tc h IN S T (P C )
E x e c u te IN S T (P C -1 )
F e tc h IN S T (P C + 1 )
E x e c u te IN S T (P C )
F e tc h IN S T (P C + 2 )
E x e c u te IN S T (P C + 1 )
Execution Flow
Program Counter
*13
0
0
0
0
0
0
0
*12
0
0
0
0
0
0
0
*11
0
0
0
0
0
0
0
*10
0
0
0
0
0
0
0
*9
0
0
0
0
0
0
0
*8
0
0
0
0
0
0
0
*7
0
0
0
0
0
0
0
*6
0
0
0
0
0
0
0
*5
0
0
0
0
0
0
0
*4
0
0
0
0
1
1
1
*3
0
0
1
1
0
0
1
*2
0
1
0
1
0
1
0
*1
0
0
0
0
0
0
0
*0
0
0
0
0
0
0
0
Mode
Initial Reset
External Interrupt
Timer/Event Counter 0 Overflow
Timer/Event Counter 1 Overflow
UART Bus Interrupt
I
2
C Bus Interrupt
Multi-function Interrupt
Skip
Loading PCL
Jump, Call Branch
Return from Subroutine
Program Counter + 2 (Within the current bank)
*13
*12
*11
*10
*9
#9
S9
*8
#8
S8
@7 @6 @5 @4 @3 @2 @1 @0
#7
S7
#6
S6
#5
S5
#4
S4
#3
S3
#2
S2
#1
S1
#0
S0
BP.5 #12 #11 #10
S13 S12 S11 S10
Program Counter
Note:
*13~*0: Program counter bits
#12~#0: Instruction code bits
1 3 1 2
8 7
P ro g ra m
B P
.5
S13~S0: Stack register bits
@7~@0: PCL bits
0
C o u n te r
B a n k P o in te r (B P )
Rev. 1.30
7
March 9, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
