HT36B0
0
0
0
0
H
other type is for wavetable code, which is addressed by
the start address ST15~0. On the program type,
WA17~0= PF4~0 ´ 213+ PC 12~0. On the wave table
ROM type, WA17~0=ST15~0 ´ 25.
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Program Memory - ROM
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The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
8192´16 bits, addressed by the bank pointer, program
counter and table pointer.
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Certain locations in the program memory of each bank
are reserved for special usage:
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2
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6
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1
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1
6
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·
Location 000H on bank0
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0
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1
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.
This area is reserved for the initialization program. Af-
ter chip reset, the program always begins execution at
location 000H on bank0.
Program Memory for Each Bank
be placed in TBLP. The TBLH is read only and cannot
be restored. If the main routine and the ISR (Interrupt
Service Routine) both employ the table read instruc-
tion, the contents of the TBLH in the main routine are
likely to be changed by the table read instruction used
in the ISR. Errors can occur. In this case, using the ta-
ble read instruction in the main routine and the ISR si-
multaneously should be avoided. However, if the table
read instruction has to be applied in both the main rou-
tine and the ISR, the interrupt should be disabled prior
to the table read instruction. It will not be enabled until
the TBLH has been backed up. All table related in-
structions need 2 cycles to complete the operation.
These areas may function as normal program mem-
ory depending upon user requirements.
·
Location 008H
This area is reserved for the Timer/Event Counter 0 in-
terrupt service program on each bank. If timer interrupt
results from a timer/event counter 0 overflow, and if the
interrupt is enabled and the stack is not full, the program
begins execution at location 008H corresponding to its
bank.
·
Location 00CH
This area is reserved for the Timer/Event Counter 1
interrupt service program on each bank. If a timer in-
terrupt results from a Timer/Event Counter 1 overflow,
and if the interrupt is enabled and the stack is not full,
the program begins execution at location 00CH corre-
sponding to its bank.
·
Bank pointer
·
Table location
The program memory is organized into 32 banks and
each bank into 8192´16 of bits program ROM. PF4~0
is used as the bank pointer only when PFC is config-
ured as output mode. PFC is the control register for
PF and is used to control the input/output configura-
tion. To function as an output, the corresponding bit of
the control register must be ²0². After an instruction
has been executed to write data to the PF register to
select a different bank, note that the new bank will not
be selected immediately. It is not until the following in-
struction has completed execution that the bank will
be actually selected. It should be note that the PF reg-
ister has to be cleared before setting to output mode.
Any location in the ROM space can be used as
look-up tables. The instructions ²TABRDC [m]² (the
current page, 1 page=256 words) and ²TABRDL [m]²
(the last page) transfer the contents of the lower-order
byte to the specified data memory, and the
higher-order byte to TBLH (08H). Only the destination
of the lower-order byte in the table is well-defined, the
higher-order byte of the table word are transferred to
the TBLH. The Table Higher-order byte register
(TBLH) is read only. The Table Pointer (TBLP) is a
read/write register (07H), which indicates the table lo-
cation. Before accessing the table, the location must
Table Location
Instruction(s)
*17~*13
TABRDC [m] P17~P13 P12 P11 P10 P9
TABRDL [m] P17~P13
*12 *11 *10
*9
*8
P8
1
*7
*6
*5
*4
*3
*2
*1
*0
@7 @6 @5 @4 @3 @2 @1 @0
@7 @6 @5 @4 @3 @2 @1 @0
1
1
1
1
Table Location
Note: *12~*0: Bits of table location
P12~P8: Bits of current Program Counter
@7~@0: Bits of table pointer
P17~P13: Bits of bank PF4~PF0
Rev. 1.10
8
July 3, 2008
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
