HT46R4A
The following timing diagram shows graphically the various stages involved in an analog to digital conversion process
and its associated timing.
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A/D Conversion Timing
The setting up and operation of the A/D converter func-
tion is fully under the control of the application program as
there are no configuration options associated with the
A/D converter. After an A/D conversion process has been
initiated by the application program, the microcontroller
internal hardware will begin to carry out the conversion,
during which time the program can continue with other
functions. The time taken for the A/D conversion is equal
clearing the A/D channel selection bits may be an impor-
tant consideration in battery powered applications.
Another important programming consideration is that
when the A/D channel selection bits change value the
A/D converter must be re-initialised. This is achieved by
pulsing the START bit in the ADCR register immediately
after the channel selection bits have changed state. The
exception to this is where the channel selection bits are
all cleared, in which case the A/D converter is not re-
quired to be re-initialised.
to 76tAD where tAD is the A/D clock period tAD
.
Programming Considerations
When programming, special attention must be given to
the A/D channel selection bits in the ADCR register. If
these bits are all cleared to zero no external pins will be
selected for use as A/D input pins allowing the pins to be
used as normal I/O pins. When this happens the power
supplied to the internal A/D circuitry will be reduced re-
sulting in a reduction of supply current. This ability to re-
duce power by turning off the internal A/D function by
A/D Programming Example
The following two programming examples illustrate how
to setup and implement an A/D conversion. In the first
example, the method of polling the bit in the ADCR reg-
ister is used to detect when the conversion cycle is com-
plete, whereas in the second example, the A/D interrupt
is used to determine when the conversion is complete.
Example: using an EOCB polling method to detect the end of conversion
clr
mov
mov
EADI
a,00000001B
ACSR,a
; disable ADC interrupt
; setup the ACSR register to select fSYS/8 as
; the A/D clock
mov
mov
a,00100000B
ADCR,a
; setup ADCR register to configure Port PB0~PB3
; as A/D inputs
; and select AN0 to be connected to the A/D
; converter
:
:
; As the Port B channel bits have changed the
; following START
; signal (0-1-0) must be issued within 10
; instruction cycles
:
Rev. 1.00
28
November 28, 2007