GS9060 Data Sheet
3.10.2 Ancillary Data Detection and Indication
The GS9060 will detect all types of ancillary data in either the vertical or horizontal
blanking spaces and indicate via the status signal output pins YANC and CANC the
position of ancillary data in the output data stream. These status signal outputs are
synchronous with PCLK and can be used as clock enables to external logic, or as
write enables to an external FIFO or other memory device.
The YANC and CANC signal operation will depend on the output data format. For
20-bit demultiplexed data, Section 3.11 on page 49, the YANC and CANC signals
will operate independently. However, for 10-bit multiplexed data, the YANC and
CANC signals will both be HIGH whenever ancillary data is detected.
The signals will be HIGH from the start of the ancillary data preamble and will
remain HIGH until after the ancillary data checksum.
The operation of the YANC and CANC signals is shown in Figure 3-6.
PCLK
LUMA DATA OUT
BLANK
ANC DATA
ANC DATA
CSUM
3FF
3FF
DC
ANC DATA
ANC DATA
ANC DATA
ANC DATA
DID
CHROMA DATA OUT
YANC
DBN
BLANK
000
ANC DATA
CANC
ANC DATA DETECTION – 20BIT OUTPUT MODE
PCLK
MULTIPLEXED
Y/Cr/Cb DATA OUT
CSUM
000
DID
DC
DBN
3FF
3FF
ANC DATA
ANC DATA
YANC/CANC
ANC DATA DETECTION – 10BIT OUTPUT MODE
Figure 3-6: YANC and CANC Output Signal Timing
3.10.2.1 Programmable Ancillary Data Detection
Although the GS9060 will detect all types of ancillary data by default, it also allows
the host interface to specifically program up to five different ancillary data types for
detection. This is accomplished via the ANC_TYPE register (Table 3-4).
For each data type to be detected, the host interface must program the DID and/or
SDID of the ancillary data type of interest. The GS9060 will compare the received
DID and/or SDID with the programmed values and assert YANC and CANC only if
an exact match is found.
If any DID or SDID value is set to zero in the ANC_TYPE register, no comparison
or match will be made for that value. For example, if the DID is programmed but
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