GS9060 Data Sheet
When H_CONFIG is set HIGH, TRS based blanking is enabled. In this case, the H
output will be HIGH for the entire horizontal blanking period as indicated by the H
bit in the received TRS ID words.
The timing of these signals is shown in Figure 3-3.
PCLK
3FF
000
000
3FF
000
000
CHROMA DATA OUT
XYZ
(eav)
XYZ
(SAV)
LUMA DATA OUT
H
V
F
H SIGNAL TIMING:
H_CONFIG = LOW
H_CONFIG = HIGH
H:V:F TIMING – 20-BIT OUTPUT MODE
PCLK
MULTIPLEXED
XYZ
(eav)
XYZ
(sav)
3FF
000
000
3FF
000
000
Y/Cr/Cb DATA OUT
H
V
F
H:V:F TIMING – 10-BIT OUTPUT MODE
Figure 3-3: H, V, F Timing
3.8 DVB-ASI Functionality
The GS9060 conforms to DVB-ASI standard EN 50083-9:1998.
The GS9060 is said to be in DVB-ASI mode once the device has detected 32
consecutive DVB-ASI words without a single word or disparity error being
generated. The device will remain in DVB-ASI mode until 32 consecutive DVB-ASI
word or disparity errors are detected, or until SMPTE TRS ID words have been
detected.
The lock detect block may also drop out of DVB-ASI mode under the following
conditions:
•
•
•
•
RESET_TRST is asserted LOW
CDx is HIGH
SMPTE_BYPASS is asserted HIGH
DVB_ASI is asserted LOW
K28.5 sync patterns in the received DVB-ASI data stream will be detected by the
device in either inverted or non-inverted form.
The application layer must set SMPTE_BYPASS LOW and DVB_ASI HIGH in
order to enable DVB-ASI operation.
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