GS9060 Data Sheet
3.10.4.1 Video Standard Indication
The video standard codes reported in the VD_STD[4:0] bits of the
VIDEO_STANDARD register represent the SMPTE standards as shown in
Table 3-8.
In addition to the 5-bit video standard code word, the VIDEO_STANDARD register
also contains an additional status bit. The STD_LOCK bit will be set HIGH
whenever the flywheel has achieved full synchronization.
The VD_STD[4:0] and STD_LOCK bits of the VIDEO_STANDARD register will
default to zero after device reset. The VD_STD[4:0] bits will also default to zero if
the device loses lock to the input data stream, (LOCKED = LOW), or if the
SMPTE_BYPASS pin is asserted LOW. The STD_LOCK bit will retain its previous
value if the input is removed.
Table 3-6: Host Interface Description for Video Standard and Data Format Register
Register Name
Bit
Name
Description
R/W
Default
VIDEO_STANDARD
Address: 04h
15
14-10
9
Not Used
VD_STD[4:0]
Not Used
Video Data Standard (see Table 3-8)
R
R
0
0
8
STD_LOCK
Standard Lock: Set HIGH when flywheel has
achieved full synchronization.
7-4
3-0
Not Used
DATA_FORMAT[3:0]
Data Format (see Table 3-9).
R
Fh
Table 3-7: Host Interface Description for Raster Structure Registers
Register Name
Bit
Name
Description
R/W
Default
RASTER_STRUCTURE1
Address: 0Eh
15-12
11-0
Not Used
RASTER_STRUCTURE1[11:0]
Not Used
Words Per Active Line.
Words Per Total Line.
Total Lines Per Frame.
Active Lines Per Field.
R
R
R
R
0
0
0
0
RASTER_STRUCTURE2
Address: 0Fh
15-12
11-0
RASTER_STRUCTURE2[11:0]
Not Used
RASTER_STRUCTURE3
Address: 10h
15-11
10-0
RASTER_STRUCTURE3[10:0]
Not Used
RASTER_STRUCTURE4
Address: 11h
15-11
10-0
RASTER_STRUCTURE4[10:0]
22208 - 8 January 2007
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