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GS9060-CF 参数 Datasheet PDF下载

GS9060-CF图片预览
型号: GS9060-CF
PDF下载: 下载PDF文件 查看货源
内容描述: HD - LINX II SD- SDI和DVB- ASI解串器,带环通电缆驱动器 [HD-LINX II SD-SDI and DVB-ASI Deserializer with Loop-Through Cable Driver]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路
文件页数/大小: 61 页 / 885 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS9060 Data Sheet  
Table 3-3: Switch Line Position for Digital Systems  
System  
Video Format  
Sampling  
Signal  
Standard  
Parallel  
Interface  
Serial  
Interface  
SwitchLine  
No.  
SDTI  
720x576/50 (2:1)  
4:2:2  
BT.656  
BT.656 +  
305M  
259M  
6, 319  
720x483/59.94 (2:1)  
960x483/59.94 (2:1)  
720x483/59.94 (2:1)  
720x483/59.94 (2:1)  
720x483/59.94 (2:1)  
720x483/59.94 (2:1)  
720x483/59.94 (1:1)  
720x483/59.94 (1:1)  
720x483/59.94 (1:1)  
720x576/50 (1:1)  
720x576/50 (1:1)  
720x576/50 (1:1)  
960x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
720x576/50 (2:1)  
4:2:2  
4:2:2  
125M  
267M  
125M + 305M  
267M  
259M  
259M  
344M  
344M  
RP175  
259M  
344M  
294M  
294M  
344M  
BT.1362  
BT.1362  
259M  
344M  
344M  
10, 273  
10, 273  
10, 273  
10, 273  
10, 273  
10, 273  
10  
525  
4:4:4:4  
4:4:4:4  
4:4:4:4  
4:2:2  
267M  
347M  
267M  
RP174  
RP175  
125M  
267M  
125M  
4:2:2  
293M  
347M  
4:2:2  
293M  
293M  
10  
4:2:0  
293M  
293M  
10  
625  
4:2:2  
BT.1358  
BT.1358  
BT.1358  
BT.601  
BT.799  
BT.799  
BT.799  
BT.601  
347M  
6
4:2:2  
BT.1358  
BT.1358  
BT.656  
347M  
6
4:2:0  
6
4:2:2  
6, 319  
6, 319  
6, 319  
6, 319  
6, 319  
4:4:4:4  
4:4:4:4  
4:4:4:4  
4:2:2  
BT.799  
BT.799  
125M  
259M  
3.7.4 HVF Timing Signal Generation  
The GS9060 extracts critical timing parameters from either the received TRS  
signals (FW_EN/DIS = LOW), or from the internal flywheel-timing generator  
(FW_EN/DIS = HIGH).  
Horizontal blanking period (H), vertical blanking period (V), and even / odd field (F)  
timing are all extracted and presented to the application layer via the H:V:F status  
output pins.  
The H signal timing is configurable via the H_CONFIG bit of the internal  
IOPROC_DISABLE register as either active line based blanking, or TRS based  
blanking, Section 3.10.6 on page 46.  
Active line based blanking is enabled when the H_CONFIG bit is set LOW. In this  
mode, the H output is HIGH for the entire horizontal blanking period, including the  
EAV and SAV TRS words. This is the default H timing used by the device.  
22208 - 8 January 2007  
33 of 61  
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