GS1560A/GS1561 Data Sheet
Application HOST
GS1560A / GS1561
CS_TMS
SCLK_TCK
SDIN_TDI
SDOUT_TDO
JTAG_HOST
In-circuit ATE probe
Figure 3-14: In-Circuit JTAG
Alternatively, if the test capabilities are to be used in the system, the host may still
control the JTAG/HOST input signal, but some means for tri-stating the host must
exist in order to use the interface at ATE. This is represented in Figure 3-15.
Application HOST
GS1560A / GS1561
CS_TMS
SCLK_TCK
SDIN_TDI
SDOUT_TDO
JTAG_HOST
Tri-State
In-circuit ATE probe
Figure 3-15: System JTAG
Please contact your Gennum representative to obtain the BSDL model for the
GS1560A/GS1561.
27360 - 8 September 2005
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