GS1560A/GS1561 Data Sheet
MSB
LSB
A0
R/W
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
RSV
A5
A4
A3
A2
A1
Figure 3-10: Command Word
MSB
D15
LSB
D0
D9
D7
D6
D4
D3
D14
D13
D12
D11
D10
D8
D5
D2
D1
Figure 3-11: Data Word
3.12.2 Data Read and Write Timing
Read and write mode timing for the GSPI interface is shown in Figure 3-12 and
Figure 3-13 respectively. The maximum SCLK frequency allowed is 6.6MHz.
When writing to the registers via the GSPI, the MSB of the data word may be
presented to SDIN immediately following the falling edge of the LSB of the
command word. All SDIN data is sampled on the rising edge of SCLK.
When reading from the registers via the GSPI, the MSB of the data word will be
available on SDOUT 12ns following the falling edge of the LSB of the command
word, and thus may be read by the host on the very next rising edge of the clock.
The remaining bits are clocked out by the GS1560A on the negative edges of
SCLK.
duty
cycle
period
t2
t4
t0
t5
SCLK
input data
setup time
t
3
CS
SDIN
output data
hold time
t6
RSV
R/W
RSV
RSV
RSV RSV
RSV
RSV
A5
A4
A3
A2
RSV
RSV
A1
A0
D9
D15 D14
D13
D12
D7
D5
D4
D2
D10
D8
D6
D3
D1
D0
D11
SDOUT
Figure 3-12: GSPI Read Mode Timing
duty
cycle
period
t2
t4
t0
SCLK
input data
setup time
t3
CS
RSV
R/W
RSV
RSV
RSV RSV
RSV
RSV
A5
A4
A3
A2
D9
SDIN
RSV
A1
A0
D15 D14
D13
D12
D7
D5
D4
D2
RSV
D10
D8
D6
D3
D1
D0
D11
Figure 3-13: GSPI Write Mode Timing
27360 - 8 September 2005
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GENNUM [ GENNUM CORPORATION ]
