GS1560A/GS1561 Data Sheet
3.14 Device Power Up
The GS1560A/GS1561 has a recommended power supply sequence. To ensure
correct power up, power the CORE_VDD pins before the IO_VDD pins.
Device pins may also be driven prior to power up without causing damage.
To ensure that all internal registers are cleared upon power-up, the application
layer must hold the RESET_TRST signal LOW for a minimum of 1ms after the core
power supply has reached the minimum level specified in Table 2-1. See
Figure 3-16.
3.15 Device Reset
In order to initialize all internal operating conditions to their default states the
application layer must hold the RESET_TRST signal LOW for a minimum of treset
=
1ms.
When held in reset, all device outputs will be driven to a high-impedance state.
+1.8V
+1.65V
CORE_VDD
treset
treset
RESET_TRST
Reset
Reset
Figure 3-16: Reset Pulse
27360 - 8 September 2005
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