GL9701 PCI ExpressTM to PCI Bridge
Return Loss
1.25 GHz.
See Note 11.
DC Differential
Input
80
40
100
50
120
60
Ω
Ω
Ω
RX DC Differential Mode
impedance.
ZRX-DIFF-DC
ZRX-DC
Impedance
DC Input
See Note 12.
Required RX D+ as well as D- DC
impedance (50 Ω +/- 20% tolerance).
See Notes 8 and 12.
Impedance
Powered Down
DC Input
200k
Required RX D+ as well as D- DC
impedance when the Receiver
terminations do not have power.
See Note 13.
ZRX-HIGH-IMP-
DC
Impedance
Electrical Idle
Detect
65
175
10
mV VRX-IDLE-DET-DIFFp-p =
2*|VRX-D+ - VRX-D-|
VRX-IDLE-DET-
DIFFp-p
Threshold
Measured at the package
pins of the Receiver.
Unexpected
Electrical Idle
Enter Detect
Threshold
Integration
Time
ms An unexpected Electrical
Idle (VRX-DIFFp-p <
TRX-IDLE-DET-
DIFFENTERTIM
E
VRX-IDLEDET- DIFFp-p) must be
recognized no longer than
TRX-IDLE-DET-DIFF-ENTERTIM
E to signal an unexpected idle
condition.
Total Skew
20
ns Skew across all Lanes on a Link.
This includes variation in the length
of a SKP ordered set (e.g., COM and
one to five SKP Symbols) at the RX
as well as any delay differences
arising from the interconnect itself.
LRX-SKEW
7. No test load is necessarily associated with this value.
8. Specified at the measurement point and measured using the clock recovery function. If the clocks to the RX
and TX are not derived from the same reference clock, the TX UI recovered using the clock recovery
function specified in Section 4.3.3.2 must be used as a reference for the eye diagram.
9. The TRX-EYE-MEDIAN-to-MAX-JITTER specification ensures a jitter distribution in which the median and
the maximum deviation from the median is less than half of the total 0.64. It should be noted that the median
©2000-2006 Genesys Logic Inc. - All rights reserved.
Page 69
GENESYS [ GENESYS LOGIC ]
