GL9701 PCI ExpressTM to PCI Bridge
Received Master-Abort Status
Reserved
3
4
5
RW1CS
RsvdZ
0
0
0
Unexpected Split Completion Error Status
RW1CS
Uncorrectable Split Completion Message Data
Error Status
6
RW1CS
0
Uncorrectable Data Error Status
Uncorrectable Attribute Error Status
Uncorrectable Address Error Status
7
8
9
RW1CS
RW1CS
RW1CS
0
0
0
Delayed Transaction Discard Timer Expired
Status
10
RW1CS
0
PERR# Assertion Detected
11
12
13
RW1CS
RW1CS
RW1CS
0
0
0
SERR# Assertion Detected (No Header Log)
Internal Bridge Error Status
6.52 Offset 130h: Secondary Uncorrectable Error Mask Register
Bits
0
Type
RWS
RWS
RWS
RWS
RsvdP
RWS
Default
Description
Target-Abort on Split Completion Mask
Master-Abort on Split Completion Mask
Received Target-Abort Mask
0
0
0
1
0
1
1
2
Received Master-Abort Mask
Reserved
3
4
Unexpected Split Completion Error Mask
5
Uncorrectable Split Completion Message Data
Error Mask
6
RWS
0
Uncorrectable Data Error Mask
7
8
9
RWS
RWS
RWS
1
1
1
Uncorrectable Attribute Error Mask
Uncorrectable Address Error Mask
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