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GL9701-MXG 参数 Datasheet PDF下载

GL9701-MXG图片预览
型号: GL9701-MXG
PDF下载: 下载PDF文件 查看货源
内容描述: PCI ExpressTM至PCI桥 [PCI ExpressTM to PCI Bridge]
分类和应用: 微控制器和处理器外围集成电路uCs集成电路uPs集成电路PC
文件页数/大小: 75 页 / 1051 K
品牌: GENESYS [ GENESYS LOGIC ]
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GL9701 PCI ExpressTM to PCI Bridge  
See Note 2.  
Minimum TX  
Eye Width  
0.75  
UI  
UI  
UI  
The maximum  
TTX-EYE  
Transmitter  
jitter can be derived as  
TTX-MAX-JITTER =  
1 - TTX-EYE = 0.25  
UI. This parameter is  
measured with the  
equivalent of a zero  
jitter reference clock.  
See Notes 2 and 3.  
Jitter is defined as the  
measurement variation  
of the crossing points  
(VTX-DIFF = 0 V)  
in relation to recovered  
TX UI. To be  
Maximum time  
between the  
0.125  
TTX-EYEMEDIAN-  
to-MAXJITTER  
jitter median and  
maximum  
deviation from  
the median.  
measured after the  
clock recovery  
function.  
See Notes 2 and 3.  
See Notes 2 and 5.  
D+/D- TX  
Output  
0.125  
TTX-RISE,  
TTX-FALL  
Rise/Fall Time  
RMS AC Peak  
Common Mode  
Output Voltage  
20  
mV VTX-CM-ACp =  
RMS(|VTX-D+ +  
VTX-D-|/2 –  
VTX-CM-ACp  
VTX-CM-DC)  
VTX-CM-DC =  
DC(avg) of |VTX-D+  
+VTX-D-|/2  
See Note 2.  
Absolute Delta  
of DC Common  
0
100  
mV |VTX-CM-DC [during  
L0] VTX-CM-Idle-  
VTX-CM-DCACTIVE-  
IDLEDELTA  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 63  
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