MB90560/565 Series
• Block diagram of waveform generator
DCK2 DCK1
DCK0
TMD1 TMD0 NRSL
DTIL
DTIE
φ
DTTI control circuit
DTTI
Divider
Clock
To GATE0, 1 (To PPG timer)
TO0
RT0
Waveform
generator
TO1
RT1
RTO0/U
Selector
RTO1/X
Compare circuit
Selector
U
8-bit timer
Deadtime generation
X
8-bit timer register 0
To GATE2, 3 (To PPG timer)
TO2
Waveform
generator
RT2
TO3
RT3
RTO2/V
Selector
8-bit timer
Compare circuit
RTO3/Y
Selector
V
Deadtime generation
Y
8-bit timer register 1
To GATE4, 5 (To PPG timer)
TO4
Waveform
generator
RT4
TO5
RT5
RTO4/W
RTO5/Z
Selector
8-bit timer
Compare circuit
Selector
W
8-bit timer register 2
Deadtime generation
φ : Machine clock frequency
42
FUJITSU [ FUJITSU ]
