FT2232C Dual USB UART / FIFO I.C.
10.0 Document Revision History
DS2232C Version 1.0 – Initial document created January 2004.
DS2232C Version 1.1 – Updated February 2004.
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Grammar Corrections
Section 4.0 Device Pin Out Figure 2 corrected.
Section 5.1 TEST pin number corrected.
Section 5.1 VCCIOA and VCCIOB pin descriptions updated.
Section 9.1 Figure 14 SP214EHCA pin numbers corrected.
Section 12.0 Company contact information updated.
DS2232C Version 1.2 – Updated April 2004.
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Section 1.0 Linux now supported.
Section 2.0 Extended EEPROM Support corrected.
Section 2.0 Synchronous Bit-Bang Mode description clarified.
Section 4.0 Figure 3 Pin 46 AVCC name corrected.
Section 5.2 Note 2 modified.
Section 5.3 IO Mode Command Hex Values added.
Section 8.1 Additional Murata part number added.
Section 8.3 TEST pin number added to figure 8.
Section 8.3 TEST pin number and missing GND added to figure 9.
Section 8.4 SI/WU pin numbers added to figure 10.
Section 8.4 TEST pin number added to figure 11.
Section 9.3 FIFO Write Cycle timings ameded. Figure 19 amended.
Section 9.5 Synchronous Bit-Bang Mode description ameded.
Sections 9.5, 9.6, 9.7, and 9.8 Enabling IO Bit Mode clarified.
Section 12.0 Email Addresses Updated.
DS2232C Version 1.2
© Future Technology Devices International Ltd. 2004
Page 53 of 54
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