FT2232C Dual USB UART / FIFO I.C.
Incoming Fast Serial Data
The external device is allowed to send data into the chip if FSCTS is high. On receipt of a Zero start bit on FSDI, the
chip will drop FSCTS on the next positive clock edge. The data from bits 0 to 7 is then clocked in (LSB first). The
next bit determines where the data will be written to. It can go to either channel A or to channel B. A ‘0’ will send it to
channel A, providing channel A is enabled for fast serial mode, otherwise it will go to channel B. A ‘1’ will send it to
channel B, providing channel B is enabled for fast serial mode, otherwise it will go to channel A. ( Either channel A, or
channel B, or both must be enabled as fast serial mode or the circuit is disabled).
Figure 35 - Fast Opto-Isolated Serial Data Format - Data input to the FT2232C
FSCTS
FSCLK
0
D0
D1
D2
D3
D4
D5
D6
D7
DEST
Destination
Bit
FSDI
Start
Bit
Data Bits - LSB first
Notes :-
(i) Start Bit is always 0.
(ii) Data is sent LSB first.
(iii) The destination bit (DEST) indicates which channel the data should go to. A ‘0’ means that it should go to channel
A, a ‘1’ means that it should go to channel B.
(iv) The target device should check CTS is high before it sends data. CTS goes low after data bit 0 (D0) and stays low
until the chip can accept more data.
Contention
There is a possibility that contention may occur, where the interface goes from being completely idle to both sending
and receiving at the same clock instance. In this case the chip backs off, and allows the data from the external device
to be received.
Data Format
The data format for either direction is :-
1) Zero Start Bit
2) Data bit 0
3) Data bit 1
4) Data bit 2
5) Data bit 3
6) Data bit 4
7) Data bit 5
8) Data bit 6
9) Data bit 7
10) Source/Destination (‘0’ indicates channel A; ‘1’ indicates channel B)
DS2232C Version 1.2
© Future Technology Devices International Ltd. 2004
Page 51 of 54
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