Electrical Characteristics
1
Table 1. Absolute Maximum Ratings (continued)
Characteristic
Symbol
Max Value
–55 to 150
Unit
Notes
Storage temperature range
T
°C
—
STG
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and
functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
2. The –0.3 to 2.75 V range is for DDR and –0.3 to 1.98 V range is for DDR2.
3. The 3.63 V maximum is only supported when the port is configured in GMII, MII, RMII, or TBI modes; otherwise the 2.75 V
maximum applies. See Section 8.2, “FIFO, GMII, MII, TBI, RGMII, RMII, and RTBI AC Timing Specifications,” for details on
the recommended operating conditions per protocol.
4. (M,L,O)V may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 2.
IN
2.1.2
Recommended Operating Conditions
Table 2 provides the recommended operating conditions for this device. Note that the values in Table 2 are
the recommended and tested operating conditions. Proper device operation outside these conditions is not
guaranteed.
Table 2. Recommended Operating Conditions
Recommended
Characteristic
Symbol
Unit
Notes
Value
Core supply voltage
PLL supply voltage
V
1.1 V ± 55 mV
1.1 V ± 55 mV
1.1 V ± 55 mV
1.1 V ± 55 mV
V
V
V
V
V
—
1
DD
AV
SV
XV
DD
DD
DD
Core power supply for SerDes transceivers
Pad power supply for SerDes transceivers
DDR and DDR2 DRAM I/O voltage
—
—
—
GV
2.5 V ± 125 mV
1.8 V ± 90 mV
DD
Three-speed Ethernet I/O voltage
LV
3.3 V ± 165 mV
2.5 V ± 125 mV
V
4
4
DD
—
TV
OV
BV
3.3 V ± 165 mV
2.5 V ± 125 mV
DD
DD
DD
2
PCI/PCI-X, DUART, system control and power management, I C,
Ethernet MII management, and JTAG I/O voltage
3.3 V ± 165 mV
V
V
3
Local bus I/O voltage
3.3 V ± 165 mV
2.5 V ± 125 mV
—
Input voltage
DDR and DDR2 DRAM signals
DDR and DDR2 DRAM reference
Three-speed Ethernet signals
MV
GND to GV
V
V
V
2
2
4
IN
DD
MV
GND to GV /2
DD
REF
LV
GND to LV
DD
IN
TV
GND to TV
IN
DD
Local bus signals
BV
GND to BV
V
V
—
3
IN
DD
PCI, DUART, SYSCLK, system control and power
OV
GND to OV
DD
IN
2
management, I C, Ethernet MII management, and
JTAG signals
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 6
Freescale Semiconductor
11
FREESCALE [ Freescale ]
