Serial RapidIO
V
max
min
DIFF
V
DIFF
0
-V
min
DIFF
-V
max
DIFF
0
A
B
1-B
1-A
1
Time in UI
Figure 58. Transmitter Output Compliance Mask
Table 70. Transmitter Differential Output Eye Diagram Parameters
Transmitter Type
V
min (mV) V
max (mV)
DIFF
A (UI)
B (UI)
DIFF
1.25 GBaud short range
1.25 GBaud long range
2.5 GBaud short range
2.5 GBaud long range
3.125 GBaud short range
3.125 GBaud long range
250
400
250
400
250
400
500
800
500
800
500
800
0.175
0.175
0.175
0.175
0.175
0.175
0.39
0.39
0.39
0.39
0.39
0.39
17.6 Receiver Specifications
LP-Serial receiver electrical and timing specifications are stated in the text and tables of this section.
Receiver input impedance shall result in a differential return loss better that 10 dB and a common mode
return loss better than 6 dB from 100 MHz to (0.8) × (Baud Frequency). This includes contributions from
on-chip circuitry, the chip package and any off-chip components related to the receiver. AC coupling
components are included in this requirement. The reference impedance for return loss measurements is
100 Ohm resistive for differential return loss and 25-Ω resistive for common mode.
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
95
FREESCALE [ Freescale ]
