Serial RapidIO
17.5 Transmitter Specifications
LP-Serial transmitter electrical and timing specifications are stated in the text and tables of this section.
The differential return loss, S11, of the transmitter in each case shall be better than
•
•
–10 dB for (Baud Frequency)/10 < Freq(f) < 625 MHz, and
–10 dB + 10log(f/625 MHz) dB for 625 MHz ≤ Freq(f) ≤ Baud Frequency
The reference impedance for the differential return loss measurements is 100 Ohm resistive. Differential
return loss includes contributions from on-chip circuitry, chip packaging and any off-chip components
related to the driver. The output impedance requirement applies to all valid output levels.
It is recommended that the 20%-80% rise/fall time of the transmitter, as measured at the transmitter output,
in each case have a minimum value 60 ps.
It is recommended that the timing skew at the output of an LP-Serial transmitter between the two signals
that comprise a differential pair not exceed 25 ps at 1.25 GB, 20 ps at 2.50 GB and 15 ps at 3.125 GB.
Table 64. Short Run Transmitter AC Timing Specifications—1.25 GBaud
Range
Characteristic
Symbol
Unit
Notes
Min
–0.40
Max
2.30
Output Voltage,
V
V
Volts
Voltage relative to COMMON of
either signal comprising a
differential pair
O
Differential Output Voltage
Deterministic Jitter
Total Jitter
500
1000
0.17
0.35
1000
mV p-p
UI p-p
UI p-p
ps
—
—
—
DIFFPP
J
J
—
—
—
D
T
Multiple output skew
S
Skew at the transmitter output
between lanes of a multilane
link
MO
Unit Interval
UI
800
800
ps
+/- 100 ppm
Table 65. Short Run Transmitter AC Timing Specifications—2.5 GBaud
Range
Characteristic
Symbol
Unit
Notes
Min
–0.40
Max
2.30
Output Voltage,
V
V
Volts
Voltage relative to COMMON of
either signal comprising a
differential pair
O
Differential Output Voltage
Deterministic Jitter
Total Jitter
500
1000
0.17
0.35
mV p-p
UI p-p
UI p-p
—
—
—
DIFFPP
J
J
—
—
D
T
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
92
FREESCALE [ Freescale ]
