Electrical Characteristics
2.1.2
Recommended Operating Conditions
Table 2 provides the recommended operating conditions for this device. Note that the values shown are the
recommended and tested operating conditions. Proper device operation outside these conditions is not
guaranteed.
Table 2. Recommended Operating Conditions
Characteristic
Symbol Recommended Value Unit Notes
Core supply voltage
PLL supply voltage
V
1.1 V ± 55 mV
1.1 V ± 55 mV
1.1 V ± 55 mV
1.1 V ± 55 mV
1.8 V ± 90 mV
1.5 V ± 75 mV
V
V
V
V
V
—
1
DD
AV
SV
XV
DD
DD
DD
Core power supply for SerDes transceivers
Pad power supply for SerDes transceivers
—
—
—
—
DDR SDRAM
Controller I/O
supply voltage
DDR2 SDRAM Interface
DDR3 SDRAM Interface
GV
DD
Three-speed Ethernet I/O voltage
LV
3.3 V ± 165 mV
2.5 V ± 125 mV
V
4
4
DD
TV
3.3 V ± 165 mV
2.5 V ± 125 mV
DD
2
DUART, system control and power management, I C, and JTAG I/O voltage OV
3.3 V ± 165 mV
V
V
3
DD
Local bus and GPIO I/O voltage
BV
3.3 V ± 165 mV
2.5 V ± 125 mV
1.8 V ± 90 mV
—
DD
Input voltage
DDR2 and DDR3 SDRAM Interface signals
MV
GND to GV
V
V
V
2
—
4
IN
DD
DDR2 and DDR3 SDRAM Interface reference
Three-speed Ethernet signals
MV
n
GV /2 ± 1%
DD
REF
LV
GND to LV
DD
IN
TV
GND to TV
IN
DD
Local bus and GPIO signals
BV
GND to BV
V
V
—
3
IN
DD
Local bus, DUART, SYSCLK, Serial RapidIO, system
control and power management, I C, and JTAG
signals
OV
GND to OV
0 to 105
IN
DD
2
Junction temperature range
T
°C
—
J
Notes:
1. This voltage is the input to the filter discussed in Section 21.2.1, “PLL Power Supply Filtering,” and not necessarily the
voltage at the AV pin, that may be reduced from V by the filter.
DD
DD
2. Caution: MV must not exceed GV by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
IN
DD
power-on reset and power-down sequences.
3. Caution: OV must not exceed OV by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
IN
DD
power-on reset and power-down sequences.
4. Caution: L/TV must not exceed L/TV by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
IN
DD
power-on reset and power-down sequences.
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
12
FREESCALE [ Freescale ]
