Freescale Semiconductor, Inc.
$0000
EXP
MODE
ADDR
SPACE
$FFFF
VALID BASE ADDR BITS:
GSIZA : GSIZB : GSIZC:
SIZE:
N/A
GA15
GA[15:14]
GA[15:13]
GA[15:12]
GA[15:11]
GA[15:10]
GA[15:10]
0 : 0 : 0
64K
0 : 0 : 1
32K
0 : 1 : 0
16K
0 : 1 : 1
8K
1 : 0 : 0
4K
1 : 0 : 1
2K
1 : 1 : 0
1K
1 : 1 : 1
DISABLED
NOTE: These examples assume a starting address of $0000.
Figure 4-4 Address Map for General-Purpose Chip Select
CSSTRH — Chip Select Clock Stretch Select
$105C
Bit 7
IO1SA
0
6
IO1SB
0
5
IO2SA
0
4
IO2SB
0
3
GSTHA
0
2
GSTHB
0
1
PSTHA
0
Bit 0
PSTHB
0
RESET:
Table 4-8 Chip Select Clock Stretch Control
Bit A
Bit B
Clock Stretch Selected
0
0
1
1
0
1
0
1
None
1 cycle
2 cycles
3 cycles
IO1SA–IO1SB — I/O Chip Select 1 Clock Stretch Select
Refer to Table 4-8.
IO2SA–IO2SB — I/O Chip Select 2 Clock Stretch Select
Refer to Table 4-8.
GSTHA–GSTHB — General-Purpose Chip Select Clock Stretch Select
Refer to Table 4-8.
PSTHA–PSTHB — Program Chip Select Clock Stretch Select
Refer to Table 4-8.
OPERATING MODES AND ON-CHIP MEMORY
MC68HC11F1
4-20
TECHNICAL DATA
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