Communication interfaces
Table 34. SPI slave mode timing (continued)
Num.
Symbol Description
Min.
Max.
tBUS - 25
Unit
Comment
12
tRI
tFI
tRO
tFO
Rise time input
Fall time input
Rise time output
Fall time output
—
ns
—
13
—
25
ns
—
SS
(INPUT)
2
12
12
13
13
4
SPSCK
(CPOL 0)
=
(INPUT)
5
5
3
SPSCK
=
(CPOL 1)
(INPUT)
9
8
10
11
11
MISO
(OUTPUT)
see
SEE
BIT 6 . . . 1
SLAVE LSB OUT
SLAVE MSB
7
note
NOTE
6
MOSI
(INPUT)
BIT 6 . . . 1
MSB IN
LSB IN
NOTE: Not defined!
Figure 16. SPI slave mode timing (CPHA=0)
SS
(INPUT)
4
2
12
12
13
13
3
SPSCK
=
(CPOL 0)
(INPUT)
5
5
SPSCK
=
(CPOL 1)
(INPUT)
11
9
10
SLAVE MSB OUT
MISO
(OUTPUT)
see
BIT 6 . . . 1
SLAVE LSB OUT
LSB IN
note
8
6
7
MOSI
(INPUT)
MSB IN
BIT 6 . . . 1
NOTE: Not defined!
Figure 17. SPI slave mode timing (CPHA=1)
MCF51JU128 Data Sheet, Rev. 4, 01/2012.
50
Freescale Semiconductor, Inc.
FREESCALE [ Freescale ]
