Port Integration Module (S12PPIMV1)
2.3.40 Port P Data Register (PTP)
Address 0x0258
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
0
PTP7
PTP5
PTP4
PTP3
PTP2
PTP1
PTP0
W
Altern.
Function
—
0
—
0
PWM5
0
PWM4
0
PWM3
0
PWM2
0
PWM1
0
PWM0
0
Reset
Figure 2-38. Port P Data Register (PTP)
1. Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Table 2-35. PTP Register Field Descriptions
Field
Description
Port P general purpose input/output data—Data Register, pin interrupt input/output
7
PTP
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• Pin interrupts can be generated if enabled in input or output mode.
5
PTP
Port P general purpose input/output data—Data Register, PWM input/output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The PWM function takes precedence over the general purpose I/O function if the related channel or the
emergency shut-down feature is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
4-0
PTP
Port P general purpose input/output data—Data Register, PWM output, pin interrupt input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The PWM function takes precedence over the general purpose I/O function if the related channel is enabled.
• Pin interrupts can be generated if enabled in input or output mode.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
87
FREESCALE [ Freescale ]
