Port Integration Module (S12PPIMV1)
Table 2-29. PTIM Register Field Descriptions
Description
Field
5-0
Port M input data—
PTIM
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
2.3.34 Port M Data Direction Register (DDRM)
Address 0x0252
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
W
0
0
DDRM5
DDRM4
DDRM3
DDRM2
DDRM1
DDRM0
Reset
0
0
0
0
0
0
0
0
Figure 2-32. Port M Data Direction Register (DDRM)
1. Read: Anytime
Write: Anytime
Table 2-30. DDRM Register Field Descriptions
Description
Field
5
Port M data direction—
DDRM
This bit determines whether the associated pin is an input or output.
Depending on the configuration of the enabled SPI the I/O state will be forced to be input or output. In this case the
data direction bit will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
4
Port M data direction—
DDRM
This bit determines whether the associated pin is an input or output.
Depending on the configuration of the enabled SPI the I/O state will be forced to be input or output. In this case the
data direction bit will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
3
Port M data direction—
DDRM
This bit determines whether the associated pin is an input or output.
Depending on the configuration of the enabled SPI the I/O state will be forced to be input or output. In this case the
data direction bit will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
83
FREESCALE [ Freescale ]
