Port Integration Module (S12PPIMV1)
2.3.31 PIM Reserved Register
Address 0x024F
Access: User read(1)
7
6
5
4
3
2
1
0
R
W
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-29. PIM Reserved Register
1. Read: Always reads 0x00
Write: Unimplemented
2.3.32 Port M Data Register (PTM)
Address 0x0250
Access: User read/write(1)
7
6
5
4
3
2
1
0
R
0
0
PTM5
PTM4
PTM3
PTM2
PTM1
PTM0
W
Altern.
Function
—
0
—
0
SCK
0
MOSI
0
SS
0
MISO
0
TXCAN
0
RXCAN
0
Reset
Figure 2-30. Port M Data Register (PTM)
1. Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Table 2-28. PTM Register Field Descriptions
Field
Description
Port M general purpose input/output data—Data Register, SPI SCK input/output
5
PTM
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI function takes precedence over the general purpose I/O function if enabled.
4
PTM
Port M general purpose input/output data—Data Register, SPI MOSI input/output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SPI function takes precedence over the general purpose I/O function if enabled.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
81
FREESCALE [ Freescale ]
