Port Integration Module (S12PPIMV1)
Table 2-1. Pin Functions and Priorities
Pin Function
& Priority(1)
Pin Function
after Reset
Port Pin Name
I/O
Description
MODC input during RESET
-
BKGD
MODC (2)
BKGD
GPIO
I
BKGD
I/O S12X_BDM communication pin
I/O General purpose
A
B
E
PA[7:0]
PB[7:0]
PE[7]
GPIO
GPIO
GPIO
I/O General purpose
ECLKX2
GPIO
O
Free-running clock at core clock rate (ECLK x 2)
GPIO
I/O General purpose
I/O General purpose
PE[6:5]
PE[4]
GPIO
ECLK
O
Free-running clock at bus clock rate or programmable down-
scaled bus clock
GPIO
GPIO
I/O General purpose
I/O General purpose
PE[3:2]
PE[1]
IRQ
I
I
I
I
Maskable level- or falling edge-sensitive interrupt
General purpose
GPI
PE[0]
PT[7:6]
PT5
XIRQ
Non-maskable level-sensitive interrupt
General purpose
GPI
T
IOC[7:6]
GPIO
I/O Timer Channels 7 - 6
I/O General purpose
I/O Timer Channel 5
GPIO
IOC5
(PWM5)
API_EXTCLK
GPIO
O
O
Pulse Width Modulator channel 5
VREG Autonomous Periodical Interrupt Clock
I/O General purpose
I/O Timer Channel 4
PT4
IOC4
(PWM4)
GPIO
O
Pulse Width Modulator channel 4
I/O General purpose
I/O Timer Channels 3 - 1
I/O General purpose
I/O Timer Channel 0
PT[3:1]
PT0
IOC[3:1]
GPIO
IOC0
(PWM0)
GPIO
O
Pulse Width Modulator channel 0
I/O General purpose
I/O General purpose
S
PS[3:2]
PS1
GPIO
GPIO
TXD
O
Serial Communication Interface transmit pin
I/O General purpose
Serial Communication Interface receive pin
GPIO
PS0
RXD
I
GPIO
I/O General purpose
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
51
FREESCALE [ Freescale ]
