Analog-to-Digital Converter (ADC12B10C)
9.1.3
Block Diagram
ICLK
Bus Clock
Internal
Clock
Clock
Prescaler
ATD_12B10C
ATD Clock
Sequence Complete
Interrupt
Trigger
Mux
ETRIG0
ETRIG1
ETRIG2
ETRIG3
Mode and
Compare Interrupt
Timing Control
(See device specifi-
cation for availability
and connectivity)
ATDCTL1
ATDDIEN
Results
ATD 0
ATD 1
ATD 2
ATD 3
ATD 4
ATD 5
ATD 6
ATD 7
ATD 8
ATD 9
VDDA
VSSA
Successive
VRH
VRL
Approximation
Register (SAR)
and DAC
+
Sample & Hold
AN9
AN8
-
Comparator
Analog
MUX
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
Figure 9-1. ADC12B10C Block Diagram
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
307
FREESCALE [ Freescale ]
