Memory Map Control (S12PMMCV1)
Register
Address
Bit 7
6
5
4
3
2
1
Bit 0
Name
0x000A
Reserved
R
0
0
0
0
0
0
0
0
W
0x000B
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015
MODE
Reserved
DIRECT
Reserved
Reserved
Reserved
PPAGE
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MODC
0
W
R
W
R
DP15
0
DP14
0
DP13
0
DP12
0
DP11
0
DP10
0
DP9
0
DP8
0
W
R
W
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
R
W
R
PIX3
PIX2
PIX1
PIX0
W
= Unimplemented or Reserved
Figure 3-2. MMC Register Summary
3.3.2
Register Descriptions
This section consists of the S12PMMC control register descriptions in address order.
3.3.2.1
Mode Register (MODE)
Address: 0x000B
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
MODC
MODC1
W
Reset
0
0
0
0
0
0
0
1. External signal (see Table 3-4).
= Unimplemented or Reserved
Figure 3-3. Mode Register (MODE)
S12P-Family Reference Manual, Rev. 1.13
110
Freescale Semiconductor
FREESCALE [ Freescale ]
