Memory Map Control (S12PMMCV1)
Table 3-6. DIRECT Field Descriptions
Description
Field
7–0
Direct Page Index Bits 15–8 — These bits are used by the CPU when performing accesses using the direct
DP[15:8]
addressing mode. These register bits form bits [15:8] of the local address (see Figure 3-6).
Bit0
Bit15
Bit8
Bit7
DP [15:8]
CPU Address [15:0]
Figure 3-6. DIRECT Address Mapping
Example 3-1. This example demonstrates usage of the Direct Addressing Mode
MOVB
#$80,DIRECT
;Set DIRECT register to 0x80. Write once only.
;Global data accesses to the range 0xXX_80XX can be direct.
;Logical data accesses to the range 0x80XX are direct.
LDY
<$00
;Load the Y index register from 0x8000 (direct access).
;< operator forces direct access on some assemblers but in
;many cases assemblers are “direct page aware” and can
;automatically select direct mode.
3.3.2.3
Program Page Index Register (PPAGE)
Address: 0x0030
7
6
5
4
3
2
1
0
R
W
0
0
0
0
PIX3
PIX2
PIX1
PIX0
Reset
0
0
0
0
1
1
1
0
Figure 3-7. Program Page Index Register (PPAGE)
Read: Anytime
Write: Anytime
These four index bits are used to map 16KB blocks into the Flash page window located in the local (CPU
or BDM) memory map from address 0x8000 to address 0xBFFF (see Figure 3-8). This supports accessing
up to 256 KB of Flash (in the Global map) within the 64KB Local map. The PPAGE index register is
effectively used to construct paged Flash addresses in the Local map format. The CPU has special access
to read and write this register directly during execution of CALL and RTC instructions.
S12P-Family Reference Manual, Rev. 1.13
112
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