Electrical Specifications
Serial Peripheral Interface Characteristics
SS
INPUT
SS PIN OF MASTER HELD HIGH
1
5
4
SPCK, CPOL = 0
OUTPUT
NOTE
4
5
SPCK, CPOL = 1
OUTPUT
NOTE
6
7
MISO
INPUT
MSB IN
BITS 6–1
BITS 6–1
LSB IN
10
11
MASTER MSB OUT
10
11
MOSI
OUTPUT
MASTER LSB OUT
Note: This first clock edge is generated internally, but is not seen at the SCK pin.
a) SPI Master Timing (CPHA = 0)
SS
INPUT
SS PIN OF MASTER HELD HIGH
1
SPCK, CPOL = 0
OUTPUT
5
NOTE
NOTE
4
SPCK, CPOL = 1
OUTPUT
5
4
6
7
LSB IN
11
MISO
INPUT
MSB IN
BITS 6–1
BITS 6–1
10
MOSI
OUTPUT
11
10
MASTER MSB OUT
MASTER LSB OUT
Note: This last clock edge is generated internally, but is not seen at the SCK pin.
b) SPI Master Timing (CPHA = 1)
Figure 19-1. SPI Master Timing
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
Data Sheet
295
MOTOROLA
Electrical Specifications