Electrical Specifications
19.12 CGM Acquisition/Lock Time Specifications
Description
Filter capacitor multiply factor
Acquisition mode time factor
Tracking mode time factor
Symbol
Min
—
Typ
Max
—
Notes
F/sV
V
CFACT
0.0154
0.1135
0.0174
KACQ
KTRK
—
—
—
—
V
(8*VDDA)/
If CF chosen
correctly
tACQ
Manual mode time to stable
—
—
—
—
(fXCLK*KACQ)
(4*VDDA)/
If CF chosen
correctly
tAL
Manual stable to lock time
Manual acquisition time
(fXCLK*KTRK
)
tLock
tACQ+tAL
—
0
—
Tracking mode entry frequency
tolerance
∆
—
—
± 3.6%
TRK
Acquisition mode entry frequency
tolerance
∆
± 7.2%
±6.3%
ACQ
∆
Lock entry frequency tolerance
Lock exit frequency tolerance
0
—
—
± 0.9%
± 1.8%
Lock
∆
±0.9%
UNL
Reference cycles per acquisition mode
measurement
nACQ
nTRK
—
—
32
—
—
Reference cycles per tracking mode
measurement
128
(8*VDDA)/
If CF chosen
correctly
tACQ
nACQ/fXCLK
Automatic mode time to stable
—
—
(fXCLK*KACQ)
(4*VDDA)/
If CF chosen
correctly
tAL
nTRK/fXCLK
—
Automatic stable to lock time
Automatic lock time
(fXCLK*KTRK
)
tLock
tACQ+tAL
—
± (fXCLK
)
PLL jitter (deviation of average bus
frequency over 2 ms)
N = VCO
freq. mult.
fJ
0
—
*(0.025%)
*(N/4)
Data Sheet
298
MC68HC908MR32 • MC68HC908MR16 — Rev. 6.0
MOTOROLA
Electrical Specifications
FREESCALE [ Freescale ]
