Infrared Serial Communications Interface Module (IRSCI)
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IRSCI status register 1 (IRSCS1)
IRSCI status register 2 (IRSCS2)
IRSCI data register (IRSCDR)
IRSCI baud rate register (IRSCBR)
IRSCI infrared control register (IRSCIRCR)
12.9.1 IRSCI Control Register 1
SCI control register 1:
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Enables loop mode operation
Enables the SCI
Controls output polarity
Controls character length
Controls SCI wakeup method
Controls idle character detection
Enables parity function
Controls parity type
Address:
$0040
Bit 7
6
ENSCI
0
5
0
4
M
0
3
WAKE
0
2
ILTY
0
1
PEN
0
Bit 0
PTY
0
Read:
Write:
Reset:
LOOPS
0
0
Figure 12-12. IRSCI Control Register 1 (IRSCC1)
LOOPS — Loop Mode Select Bit
This read/write bit enables loop mode operation for the SCI only. In loop mode the RxD pin is
disconnected from the SCI, and the transmitter output goes into the receiver input. Both the transmitter
and the receiver must be enabled to use loop mode. The infrared encoder/decoder is not in the loop.
Reset clears the LOOPS bit.
1 = Loop mode enabled
0 = Normal operation enabled
ENSCI — Enable SCI Bit
This read/write bit enables the SCI and the SCI baud rate generator. Clearing ENSCI sets the SCTE
and TC bits in SCI status register 1 and disables transmitter interrupts. Reset clears the ENSCI bit.
1 = SCI enabled
0 = SCI disabled
MC68HC908AP Family Data Sheet, Rev. 4
198
Freescale Semiconductor
FREESCALE [ Freescale ]
