Freescale Semiconductor, Inc.
Table 4-2. System Frequencies from 32.768-kHz Reference
Y
W = 0; X = 0
131
W = 0; X = 1
262
W = 1; X = 0
524
W = 1; X = 1
000000
000101
001010
001111
010100
011001
011111
100011
101000
101101
110010
110111
111100
111111
1049
786
1573
3146
5767
8389
11010
13631
16777
18874
21496
24117
–
6291
1442
2097
2753
3408
4194
4719
5374
6029
6685
7340
7995
8389
2884
11534
4194
16777
5505
22020
6816
–
–
–
–
–
–
–
–
–
8389
9437
10748
12059
13369
14680
15991
16777
–
–
–
NOTE: System frequencies are in kHz.
4.2.3.3 CLOCK CONTROL. The clock control circuits determine the source used for both
internal and external clocks during special circumstances, such as low-power stop
(LPSTOP) execution.
Table 4-3 summarizes the clock activity during LPSTOP in crystal mode operation. Any
clock in the off state is held low. The STEXT and STSIM bits in the SYNCR control clock
activity during LPSTOP. Refer to 4.2.6 Low-Power Stop for additional information.
Table 4-3. Clock Control Signals
Control Bits
Clock Outputs
STSIM
STEXT
SIMCLK
CLKOUT
Off
0
0
1
1
0
1
0
1
EXTAL
EXTAL
VCO
EXTAL
Off
VCO
VCO
NOTE: SIMCLK runs the periodic interrupt RESET and
IRQ≈ pin synchronizers in LPSTOP mode.
4.2.4 Chip Select Operation
Typical microprocessor systems require external hardware to provide select signals to
external memory and peripherals. The MC68340 integrates these functions on chip to
provide the cost, speed, and reliability benefits of a higher level of integration. The chip
select function contains register pairs for each external chip select signal. The pair
consists of a base address register and an address mask register that define the
characteristics of a single chip select. The register pair provides flexibility for a wide
variety of chip select functions.
MOTOROLA
MC68340 USER’S MANUAL
4- 13
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