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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Development Support  
18.4.5 BDM Registers  
Seven BDM registers are mapped into the standard 64-Kbyte address  
space when BDM is active. Mapping is shown in Table 18-4.  
Table 18-4. BDM registers  
Address  
$FF00  
Register  
BDM Instruction Register  
BDM Status Register  
BDM Shift Register  
$FF01  
$FF02 – $FF03  
$FF04 – $FF05  
$FF06  
BDM Address Register  
BDM CCR Holding Register  
• The INSTRUCTION register content is determined by the type of  
background command being executed.  
• The STATUS register indicates BDM operating conditions.  
• The SHIFT register contains data being received or transmitted  
via the serial interface.  
• The ADDRESS register is temporary storage for BDM commands.  
• The CCRSAV register preserves the content of the CPU12 CCR  
while BDM is active.  
The only registers of interest to users are the STATUS register and the  
CCRSAV register. The other BDM registers are only used by the BDM  
firmware to execute commands. The registers are accessed by means  
of the hardware READ_BD and WRITE_BD commands, but should not  
be written during BDM operation (except the CCRSAV register which  
could be written to modify the CCR value).  
Technical Data  
MC68HC912DG128 — Rev 3.0  
Development Support  
For More Information On This Product,  
Go to: www.freescale.com  
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