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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Development Support  
Background Debug Mode  
18.4.3 BDM Commands  
The BDM command set consists of two types: hardware and firmware.  
Hardware commands allow target system memory to be read or written.  
Target system memory includes all memory that is accessible by the  
CPU12 including EEPROM, on-chip I/O and control registers, and  
external memory that is connected to the target HC12 MCU. Hardware  
commands are implemented in hardware logic and do not require the  
HC12 MCU to be in BDM mode for execution. The control logic watches  
the CPU12 buses to find a free bus cycle to execute the command so the  
background access does not disturb the running application programs.  
If a free cycle is not found within 128 B-clock cycles, the CPU12 is  
momentarily frozen so the control logic can steal a cycle. Commands  
implemented in BDM control logic are listed in Table 18-2.  
MC68HC912DG128 — Rev 3.0  
Technical Data  
Development Support  
For More Information On This Product,  
Go to: www.freescale.com  
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