Freescale Semiconductor, Inc.
Development Support
Background Debug Mode
18.4 Background Debug Mode
Background debug mode (BDM) is used for system development, in-
circuit testing, field testing, and programming. BDM is implemented in
on-chip hardware and provides a full set of debug options.
Because BDM control logic does not reside in the CPU, BDM hardware
commands can be executed while the CPU is operating normally. The
control logic generally uses free CPU cycles to execute these
commands, but can steal cycles from the CPU when necessary. Other
BDM commands are firmware based, and require the CPU to be in active
background mode for execution. While BDM is active, the CPU executes
a firmware program located in a small on-chip ROM that is available in
the standard 64-Kbyte memory map only while BDM is active.
The BDM control logic communicates with an external host development
system serially, via the BKGD pin. This single-wire approach minimizes
the number of pins needed for development support.
18.4.1 Enabling BDM Firmware Commands
BDM is available in all operating modes, but must be made active before
firmware commands can be executed. BDM is enabled by setting the
ENBDM bit in the BDM STATUS register via the single wire interface
(using a hardware command; WRITE_BD_BYTE at $FF01). BDM must
then be activated to map BDM registers and ROM to addresses $FF00
to $FFFF and to put the MCU in active background mode.
After the firmware is enabled, BDM can be activated by the hardware
BACKGROUND command, by the BDM tagging mechanism, or by the
CPU BGND instruction. An attempt to activate BDM before firmware has
been enabled causes the MCU to resume normal instruction execution
after a brief delay.
BDM becomes active at the next instruction boundary following
execution of the BDM BACKGROUND command, but tags activate BDM
before a tagged instruction is executed.
MC68HC912DG128 — Rev 3.0
Technical Data
Development Support
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