Freescale Semiconductor, Inc.
MSCAN Controller
Programmer’s Model of Control Registers
interrupt enable flag in the CTCR register. A hard or soft reset will reset
the register.
Bit 7
0
6
5
4
3
0
2
TXE2
1
1
TXE1
1
Bit 0
TXE0
1
CTFLG
$0106
R
ABTAK2
ABTAK1
ABTAK0
W
RESET
0
0
0
0
0
ABTAK2 – ABTAK0 — Abort Acknowledge
This flag acknowledges that a message has been aborted due to a
pending abort request from the CPU. After a particular message
buffer has been flagged empty, this flag can be used by the
application software to identify whether the message has been
aborted successfully or has been sent in the meantime. The ABTAKx
flag is cleared implicitly whenever the corresponding TXE flag is
cleared.
0 = The massage has not been aborted, thus has been sent out.
1 = The message has been aborted.
TXE2 – TXE0 —Transmitter Buffer Empty
This flag indicates that the associated transmit message buffer is
empty, thus not scheduled for transmission. The CPU must
handshake (clear) the flag after a message has been set up in the
transmit buffer and is due for transmission. The msCAN12 sets the
flag after the message has been sent successfully. The flag is also set
by the msCAN12 when the transmission request was successfully
aborted due to a pending abort request (msCAN12 Transmitter
Control Register (CTCR)). If not masked, a transmit interrupt is
pending while this flag is set.
Clearing a TXEx flag also clears the corresponding ABTAKx flag (see
above). When a TXEx flag is set, the corresponding ABTRQx bit is
cleared (see msCAN12 Transmitter Control Register (CTCR)).
0 = The associated message buffer is full (loaded with a message
due for transmission).
1 = The associated message buffer is empty (not scheduled).
WARNING: To ensure data integrity, no registers of the transmit buffers should be written
to while the associated TXE flag is cleared.
MC68HC912DG128 — Rev 3.0
Technical Data
MSCAN Controller
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
