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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
MSCAN Controller  
Low Power Modes  
NOTE: The MCU cannot clear the SLPRQ bit before the msCAN12 is in Sleep  
Mode (SLPAK = 1).  
After wake-up, the msCAN12 waits for 11 consecutive recessive bits to  
synchronize to the bus. As a consequence, if the msCAN12 is woken-up  
by a CAN frame, this frame is not received. The receive message buffers  
(RxBG and RxFG) contain messages if they were received before sleep  
mode was entered. All pending actions are executed upon wake-up:  
copying of RxBG into RxFG, message aborts and message  
transmissions. If the msCAN12 is still in bus-off state after leaving Sleep  
Mode, it continues counting the 128*11 consecutive recessive bits.  
msCAN12 Running  
SLPRQ = 0  
SLPAK = 0  
MCU  
MCU  
or msCAN12  
msCAN12 Sleeping  
SLEEP Request  
SLPRQ = 1  
SLPAK = 1  
SLPRQ = 1  
SLPAK = 0  
msCAN12  
Figure 17-6. SLEEP Request / Acknowledge Cycle  
17.8.2 msCAN12 SOFT_RESET Mode  
In SOFT_RESET mode, the msCAN12 is stopped. Registers can still be  
accessed. This mode is used to initialize the module configuration, bit  
timing, and the CAN message filter. See msCAN12 Module Control  
Register 0 (CMCR0) for a complete description of the SOFT_RESET  
mode.  
MC68HC912DG128 — Rev 3.0  
Technical Data  
MSCAN Controller  
For More Information On This Product,  
Go to: www.freescale.com  
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