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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
MSCAN Controller  
NOTE: When setting the SFTRES bit, the msCAN12 immediately stops all  
ongoing transmissions and receptions, potentially causing the CAN  
protocol violations. The user is responsiblefor ensuring that the  
msCAN12 is not active when SOFT_RESET mode is entered. The  
recommended procedure is to bring the msCAN12 into SLEEP mode  
before the SFTRES bit is set.  
17.8.3 msCAN12 POWER_DOWN Mode  
The msCAN12 is in POWER_DOWN mode when  
• the CPU is in STOP mode or  
• the CPU is in WAIT mode and the CSWAI bit is set (see msCAN12  
Module Control Register 0 (CMCR0)).  
When entering the POWER_DOWN mode, the msCAN12 immediately  
stops all ongoing transmissions and receptions, potentially causing CAN  
protocol violations.  
NOTE: The user is responsible to take care that the msCAN12 is not active  
when POWER_DOWN mode is entered. The recommended procedure  
is to bring the msCAN12 into SLEEP mode before the STOP instruction  
(or the WAI instruction, if CSWAI is set) is executed.  
To protect the CAN bus system from fatal consequences of violations to  
the above rule, the msCAN12 drives the TxCAN pin into recessive state.  
In POWER_DOWN mode, no registers can be accessed.  
17.8.4 Programmable Wake-Up Function  
The msCAN12 can be programmed to apply a low-pass filter function to  
the RxCAN input line while in SLEEP mode (see control bit WUPM in the  
module control register, msCAN12 Module Control Register 0  
(CMCR0)). This feature can be used to protect the msCAN12 from  
wake-up due to short glitches on the CAN bus lines. Such glitches can  
result from electromagnetic interference within noisy environments.  
Technical Data  
MC68HC912DG128 — Rev 3.0  
MSCAN Controller  
For More Information On This Product,  
Go to: www.freescale.com  
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