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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
MSCAN Controller  
Interrupts  
Receiver error passive: the receive error counter has  
exceeded the error passive limit of 127 and msCAN12 has  
gone to error passive state.  
Transmitter error passive: the transmit error counter has  
exceeded the error passive limit of 127 and msCAN12 has  
gone to error passive state.  
Bus off: the transmit error counter has exceeded 255 and  
msCAN12 has gone to BUSOFF state.  
17.6.1 Interrupt Acknowledge  
Interrupts are directly associated with one or more status flags in either  
the msCAN12 receiver flag register (CRFLG) or the msCAN12  
transmitter flag register (CTFLG). Interrupts are pending as long as one  
of the corresponding flags is set. The flags in above registers must be  
reset within the interrupt handler in order to handshake the interrupt. The  
flags are reset through writing a 1 to the corresponding bit position. A flag  
cannot be cleared if the respective condition still prevails.  
NOTE: Bit manipulation instructions (BSET) shall not be used to clear interrupt  
flags.  
17.6.2 Interrupt Vectors  
The msCAN12 supports four interrupt vectors as shown in Table 17-1.  
The vector addresses and the relative interrupt priority are dependent on  
the chip integration and to be defined.  
MC68HC912DG128 — Rev 3.0  
Technical Data  
MSCAN Controller  
For More Information On This Product,  
Go to: www.freescale.com  
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