Freescale Semiconductor, Inc.
Analog-to-Digital Converter
RST — Module Reset Bit
When set, this bit causes all registers and activity in the module to
assume the same state as out of power-on reset (except for ADPU bit
in ATDCTL2, which remains set, allowing the ATD module to remain
enabled).
TSTOUT — Multiplex Output of TST[3:0] (Factory Use)
TST[3:0] — Test Bits 3 to 0 (Reserved)
Selects one of 16 reserved factory testing modes
Bit 7
PADx7
-
6
PADx6
-
5
PADx5
-
4
PADx4
-
3
PADx3
-
2
PADx2
-
1
PADx1
-
Bit 0
PADx0
-
RESET:
PORTAD0/PORTAD1 — Port AD Data Input Register
$006F/$01EF
PADx[7:0] — Port AD Data Input Bits
After reset these bits reflect the state of the input pins.
May be used for general-purpose digital input. When the software
reads PORTADx, it obtains the digital levels that appear on the
corresponding port AD pins. Pins with signals not meeting VIL or VIH
specifications will have an indeterminate value. Writes to this register
have no meaning at any time.
Technical Data
MC68HC912DG128 — Rev 3.0
Analog-to-Digital Converter
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