Freescale Semiconductor, Inc.
Internal Clock Generator Module (ICG)
The switch automatically selects ICLK during reset. When the clock
monitor is on (CMON is set) and it determines one of the clock sources
is inactive (as indicated by the IOFF or EOFF signals), the circuit is
forced to select the active clock. There are no clocks for the inactive side
of the synchronizer to properly operate, so that side is forced deselected.
However, the active side will not be selected until one to two clock cycles
after the IOFF or EOFF signal transitions.
8.5 Usage Notes
The ICG has several features which can provide protection to the
microcontroller if properly used. There are other features which can
greatly simplify usage of the ICG if certain techniques are employed.
This section will describe several possible ways to use the ICG and its
features. These techniques are not the only ways to use the ICG, and
may not be optimum for all environments. In any case, these techniques
should be used only as a template, and the user should modify them
according to the application’s requirements.
These notes include:
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Switching clock sources
Enabling the clock monitor
Using clock monitor interrupts
Quantization error in DCO output
Switching internal clock frequencies
Nominal frequency settling time
Improving frequency settling time
Trimming frequency
Advance Information
122
MC68HC908RFRK2
MOTOROLA
Internal Clock Generator Module (ICG)
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