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68HC705SB7 参数 Datasheet PDF下载

68HC705SB7图片预览
型号: 68HC705SB7
PDF下载: 下载PDF文件 查看货源
内容描述: 规格(通用版) [SPECIFICATION (General Release)]
分类和应用:
文件页数/大小: 170 页 / 1982 K
品牌: FREESCALE [ Freescale ]
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August 27, 1998  
GENERAL RELEASE SPECIFICATION  
SECTION 15  
ANALOG SUBSYSTEM  
The analog subsystem of the MC68HC05SB7 is based on an on-chip voltage  
comparator as shown in Figure 15-1.  
This configuration provides following features:  
The voltage comparator with external access to both inverting and non-  
inverting inputs  
The voltage comparator can be connected as a single-slope A/D. The  
possible single-slope A/D connection provides the following features:  
– A/D conversions can use V  
or an external voltage as a reference  
DD  
with software used to calculate ratiometric or absolute results  
– Channel access to up to eight inputs via multiplexer control with  
independent multiplexer control allowing multiple input connections  
– Access to V and V for calibration  
DD  
SS  
– Divide by 2 to extend input voltage range  
– The comparator can be inverted to calculate input offsets  
– Internal sample and hold capacitor  
Voltages are resolved by measuring the time it takes an external capacitor to  
charge up to the level of the unknown input voltage that is being measured. The  
beginning of the A/D conversion time can be started by several means:  
Output compare from the 16-bit programmable Timer  
Timer overflow from the 16-bit programmable Timer  
Direct software control via a register bit  
The end of the A/D conversion time can be captured by several means:  
Input capture in the 16-bit programmable Timer  
Interrupt generated by the comparator output  
Software polling of the comparator output using software loop time  
MC68HC05SB7  
REV 2.1  
ANALOG SUBSYSTEM  
MOTOROLA  
15-1  
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