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68HC705SB7 参数 Datasheet PDF下载

68HC705SB7图片预览
型号: 68HC705SB7
PDF下载: 下载PDF文件 查看货源
内容描述: 规格(通用版) [SPECIFICATION (General Release)]
分类和应用:
文件页数/大小: 170 页 / 1982 K
品牌: FREESCALE [ Freescale ]
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August 27, 1998  
GENERAL RELEASE SPECIFICATION  
not be changed while waiting for a comparator flag. Further, any changes to the  
state of the INV bit should be followed by writing a logical one to CPFR bit to clear  
an extraneous CPF flag that may have occurred.  
VREF  
This is a read/write bit that connects the channel select bus to V for purposes  
DD  
of making a reference voltage measurement. It cannot be selected if any of the  
other input sources to the channel select bus are selected as shown in  
Table 15-2. This bit is cleared by a reset of the device.  
1 = Channel select bus connected to V  
cleared.  
if MUX7:0 and IBREF are  
DD  
0 = Channel select bus cannot be connected to V .  
DD  
IBREF  
This is a read/write bit that connects the channel select bus to V for purposes  
IB  
of making a reference voltage measurement. It cannot be selected if any of the  
other input sources to the channel select bus are selected as shown in  
Table 15-2. This bit is cleared by a reset of the device.  
1 = Channel select bus connected to V if MUX7:0 and VREF are  
IB  
cleared.  
0 = Channel select bus cannot be connected to V .  
IB  
MUX7:0  
These are read/write bits that connect the analog subsystem pins to the chan-  
nel select bus and voltage comparator for purposes of making a voltage mea-  
surement. They can be selected individually or combined with any of the other  
input sources to the channel select bus as shown in Table 15-2.  
NOTE  
The V  
voltage source shown in Figure 15-1 depicts a small offset voltage  
AOFF  
generated by the total chip current passing through the package bond wires and  
lead frame that are attached to the single V pin. The offset raises the internal  
SS  
V
reference (AV ) in the analog subsystem with respect to the external V  
SS  
SS SS  
pin. Turning on the V MUX to the channel select bus connects it to this internal  
SS  
AVSS reference line.  
When making A/D conversions this AV  
offset gets placed on the external  
SS  
ramping capacitor since the discharge device on the CAP pin discharges the  
external capacitor to the internal AV line. Under these circumstances the  
SS  
positive input (+) to the comparator will always be higher than the negative input (–  
) until the negative input reaches the AV offset voltage plus any offset in the  
SS  
comparator.  
Therefore, input voltages cannot be resolved if they are less than the sum of the  
AV offset and the comparator offset, because they will always yield a low output  
SS  
from the comparator  
MC68HC05SB7  
REV 2.1  
ANALOG SUBSYSTEM  
MOTOROLA  
15-5  
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