August 27, 1998
GENERAL RELEASE SPECIFICATION
BIT 7
CSEN
0
BIT 6
X30
0
BIT 5
X10
0
BIT 4
CSCAL
0
BIT 3
CDEN
0
BIT 2
CDIE
0
BIT 1
BIT 0
CDIF
CSSCR
$000A
R
0
CDIFR
0
W
reset:
0
Figure 13-2. CSA Status and Control Register (CSSCR)
CSEN — Current Sense Amplifier Enable
This read/write bit enables the CSA module. Reset clears the CSEN bit.
1 = CSA block enabled.
0 = CSA block disabled.
X30, X10 — Current Sense Amplifier Gain Select
These read/write bits enable the respective gain to be selected. See
Table 13-2. Reset clears the X30 and X10 bits.
Table 13-2. Current Sense Amplifier Gain Select
X30
X10
GAIN SELECTED
0
1
1
Don’t care
X10
X30
0
1
Undetermined
CSCAL — Current Sense Amplifier Calibration Enable
This read/write bit enables the CSA calibration. Reset clears the CSCAL bit.
1 = CSA calibration enabled; current amplifier input connected to
ground (V ).
SS
0 = CSA calibration disabled; current amplifier input from CSA pin.
CDEN — Current Detect Enable
This read/write bit enables the current detect comparator and current detect
output pin (CS0 or CS1) logic. Reset clears the CDEN bit.
1 = Current detect comparator enabled.
0 = Current detect comparator disabled.
CDIE — Current Detect Interrupt Enable
This read/write bit enables interrupts caused by detecting the current passing
through the sensing resistor, R
. Reset clears the CDIE bit.
SENSE
1 = Current detect interrupt enabled.
0 = Current detect interrupt disabled.
CDIFR — Current Detect Interrupt Flag Reset
Writing a logic “1” to this write-only bit clears the CDIF bit. CDIFR always reads
as a logic zero. Reset does not affect CDIFR.
1 = Clear CDIF bit.
0 = No affect on CDIF bit.
MC68HC05SB7
REV 2.1
CURRENT SENSE AMPLIFIER
MOTOROLA
13-3
FREESCALE [ Freescale ]
