August 27, 1998
GENERAL RELEASE SPECIFICATION
FROM
RESET
YES
I BIT SET?
NO
YES
YES
YES
YES
YES
YES
EXTERNAL
CLEAR IRQ LATCH.
INTERRUPT?
NO
CORE TIMER
INTERRUPT?
NO
TIMER
INTERRUPT?
NO
SM-BUS
INTERRUPT?
NO
ANALOG
INTERRUPT?
NO
CDET
INTERRUPT?
STACK PCL, PCH, X, A, CCR.
SET I BIT.
NO
LOAD PC WITH INTERRUPT VECTOR.
FETCH NEXT
INSTRUCTION.
SWI
YES
YES
INSTRUCTION?
NO
RTI
UNSTACK CCR, A, X, PCH, PCL.
EXECUTE INSTRUCTION.
INSTRUCTION?
NO
Figure 4-2. Interrupt Flow Chart
MC68HC05SB7
REV 2.1
INTERRUPTS
MOTOROLA
4-3