August 27, 1998
GENERAL RELEASE SPECIFICATION
SECTION 4
INTERRUPTS
An interrupt temporarily stops normal program execution to process a particular
event. An interrupt does not stop the execution of the instruction in progress, but
takes effect when the current instruction completes its execution. Interrupt pro-
cessing automatically saves the CPU registers on the stack and loads the pro-
gram counter with a user-defined vector address.
4.1
INTERRUPT VECTORS
Table 4-1. Reset/Interrupt Vector Addresses
Global
Hardware Software
Local
Control
Bit
Priority
(1 = Highest)
Vector
Address
Function
Source
Mask
Mask
Power-On Logic
RESET Pin
Low Voltage Reset
Illegal Address Reset
—
Reset
—
—
1
$1FFE–$1FFF
1
COP Watchdog
User Code
COPON
Software
Interrupt (SWI)
Same Priority
As Instruction
—
—
—
—
—
$1FFC–$1FFD
$1FFA–$1FFB
$1FF8–$1FF9
External
Interrupt (IRQ)
IRQ/V Pin
I Bit
I Bit
IRQE Bit
2
3
PP
Core Timer
Interrupts
TOF Bit
RTIF Bit
TOFE Bit
RTIE Bit
Programmable
Timer
ICF Bit
OCF Bit
TOF Bit
ICIE Bit
OCIE Bit
TOIE Bit
—
I Bit
4
$1FF6–$1FF7
Interrupts
SM-Bus
Interrupt
SMIF Bit
—
—
—
I Bit
I Bit
I Bit
SMIE Bit
CPIE Bit
CIE Bit
5
6
7
$1FF4–$1FF5
$1FF2–$1FF3
$1FF0–$1FF1
Analog
Interrupt
CPF1 Bit
CPF2 Bit
Current Detect
Interrupt
CIF Bit
1. COPON enables the COP watchdog timer
Table 4-1 summarizes the reset and interrupt sources and vector assignments.
MC68HC05SB7
REV 2.1
INTERRUPTS
MOTOROLA
4-1
FREESCALE [ Freescale ]
