Freescale Semiconductor, Inc.
Prog ra m m a b le Tim e r
11.5 Inp ut Ca p ture Re g iste rs (ICRH a nd ICRL)
The input capture function is a means to record the time at which an
event occurs. The source of the event can be the change on an external
pin (PB3/AN3/TCAP) or the CPF2 flag bit of voltage comparator 2 in the
analog subsystem. The ICEN bit in the analog subsystem control
register (ACR) at $001D selects which source is the input signal. When
the input capture circuitry detects an active edge on the selected source,
it latches the contents of the free-running timer counter registers into the
input capture registers as shown in Figure 11-6.
NOTE: Both the ICEN bit in the ACR and the IEDG bit in the TCR must be set
when using voltage comparator 2 to trigger the input capture function
Latching values into the input capture registers at successive edges of
the same polarity measures the period of the selected input signal.
Latching the counter values at successive edges of opposite polarity
measures the pulse width of the signal.
INTERNAL
DATA
BUS
READ
ICRH
PB3
AN3
TCAP
EDGE
SELECT
& DETECT
LOGIC
ICRH ($0014)
INPUT
SELECT
MUX
ICRL ($0015)
READ
ICRL
LATCH
INTERNAL
CLOCK
÷ 4
16-BIT COUNTER
INPUT CAPTURE (ICF)
CPF2
FLAG
BIT
(OSC ÷ 2)
TIMER
INTERRUPT
REQUEST
FROM
ANALOG
SUBSYSTEM
ICEN
CONTROL
BIT
RESET
TIMER CONTROL REG.
TIMER STATUS REG.
$0012
$0013
INTERNAL
DATA
BUS
Figure 11-6. Timer Input Capture Block Diagram
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Programmable Timer
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
