Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
7.2.3 SIOP Data Register (SDR)
This register is located at address $000C and is both the transmit and receive
data register. This system is not double buffered and any write to this register will
destroy the previous contents. The SDR can be read at any time, but if a
transmission is in progress the results may be ambiguous. Writes to the SDR
while a transmission is in progress can cause invalid data to be transmitted and/or
received. This register can be read and written only when the SIOP is enabled
(SPE=1).
$0C
RESET:
U
U
U
U
U
U
U
U
Figure 7-5. SIOP Data Register
Rev. 2.0
7-5
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
