Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
SECTION 7
SIMPLE SERIAL INPUT/OUTPUT PORT
This device includes a simple synchronous serial I/O port. The SIOP is a three
wire master/slave system including serial clock (SCK), serial data input (SDI), and
serial data output (SDO). A mask programmable option determines whether the
SIOP is MSB or LSB first.
RESET
R
D
C
SDO
Q
SCK
SDI
8-BIT SHIFT REGISTER
MSB/LSB MASK OPTION
DATA BUS
Figure 7-1. SIOP Block Diagram
7.1
Signal Format
The following paragraphs describe the SIOP signal format.
Rev. 2.0
7-1
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